CS 221 - Computer Logic and Organization

Shai Simonson    306 Stanger    (508) 565-1008

Email:  shai@stonehill.edu

Homepage: http://www.stonehill.edu/compsci/shai.htm


Assignment 4 - 35 points

Due: Before Thanksgiving Break


Chapter 5:  1, 2, 6, 7, 8   (Points: 2, 2, 2, 3, 6)

Hints:  For 7,
see section 5.17 on page 210 for an explanation of gate delays. You may assume that at the start D', Q, and Q' are 0, 1, and 0 respectively.  That is, assume, that the D has been high for long enough for the other signals to start at stable values. For 8, you may find it easier to build the JK out of D flip-flops using a FSM idea, and then replace the D flip-flops with SR latches as we did in class.

Chapter 6:  2 a,b,c, 3 a,c,e,g, 4, 8         (Points: 6, 8, 3, 3)