CS 221 - Computer Logic and Organization

Shai Simonson    306 Stanger    (508) 565-1008

Email:  shai@stonehill.edu

Homepage: http://www.stonehill.edu/compsci/shai.htm


Assignment 3 - 35 points
Due: Wednesday, November 1



My Problem I:                                                                    (3 points)

Using one 2 to 1 Multiplexer (MUX) for each, show how to implement:
Hints:  There are three inputs to a 1-2 MUX.  To implement a NOT gate, use the Boolean input for control, and hardwire the data inputs with 1 and 0.  To implement an AND or an OR, use the two boolean inputs for the two data inputs, and splice one of the data inputs to  the control.

Chapter 4:

Problems: 1, 7, 8, 13, 14, 24, 27, 31, 32  (Hint: look at Figure 4.33).                (points:  5, 2, 5, 3, 2, 2, 2, 3, 2)

(Second Edition:  Chapter 2: 4, 10  Chapter 4:  10, 18, 23, 24, 26, 30, 31.        (points:  5, 6, 2, 5, 3, 2, 2, 3, 2 )

Chapter 5 - Page 177

Problems: 10, 12                                                                                        (points: 2, 2)

My Problem II:  Recall that any function with n inputs can be implemented with an n to 2n multiplexer.  Use a 4 to 16 multiplexer (4-16 MUX) to implement the first function in problem 5.10.  (2 points)

Hint:  Use the four Boolean inputs for control, and hardwire the data inputs.

(Second Edition:  My Problem II:  Recall that any function with n inputs can be implemented with an n to 2n multiplexer.  Use a 4 to 16 multiplexer (4-16 MUX) to implement w'xy'z+w'xz.        (2 points))